Flash memory has, since its birth at Toshiba in the 1980s, matured from camera devices and memory cards to virtually all handheld computing devices and enterprise electronics. Consumer demand has simultaneously pushed device capacities up to 256 GB of nonvolatile storage. But as demand for smaller form factors and even higher capacity increases, the electronics industry will soon exhaust the advantages of NAND-based Flash memory.
Memory capacity is essentially correlated with device density and the number of bits stored in each memory cell. In traditional single-level cell (SLC) devices, each cell stores only one bit of information. Recently launched multi-level cell (MLC) memories on the other hand can store 2 bits per cell by using four states per cell. These different intermediate states are achieved by choosing different amounts of electrical charge to apply to the floating gates of the memory cells. As the number of states increases, however, devices start to suffer from higher bit-error-rates (BER). To reduce the BER, memory manufacturers have traditionally utilized redundant storage, which in turn reduces the effective device density.
The other approach for increasing memory capacities is increasing the physical density of the memory cell architecture. Here, NAND-based flash memory capacities are inherently limited by the two-dimensionality imposed by MOSFET transistors. In five years, it is expected that the current Flash memory technologies will fail to address the conflicting demands for higher capacity and smaller form factors. This year itself the feature size of flash memory cells reached 19nm, which stands as the minimum limit of current semiconductor technology.
Consequently, since as early as 2003, various memory semiconductor companies began investing in development of alternate non-volatile memories, some of which are expected to achieve up to 4 times the density of Flash memories. These
include resistive memories such as memristor, RRAM and Unity Semiconductor’s CMOx; Phase-Change RAM, being developed by Samsung and others, and magnetic memories such as FeRAM, MRAM and STTRAM. This report details an overview of the emerging non-volatile memory technologies and a state of the art analysis for each of them.
About Flash Memory
NAND flash stores information in an array of memory cells made from floating gate MOSFET transistors connected in resemblance of a NAND gate. Each MOSFET cell contains 2 gates: a control gate and a floating gate for trapping electrical charge. Switching threshold of the transistor changes according to whether the floating gate contains these charges or not.
A large number of MOSFETs can be arranged in a 2D array where gate terminals are connected in the row direction to form word lines and the drain terminals are connected in the column direction. In NAND flash, these transistors are connected in series such that only if all word
lines are pulled high with a voltage exceeding the transistors’ threshold voltage is a bit line pulled low.
Using transistors to store information means that when these are fabricated onto the substrate, the memory capacity is governed directly by the number of devices we can put onto the substrate and hence by the surface area of the wafer.
Notwithstanding its limitations, NAND flash has been one of the most aggresively developed memory technologies in the past decade. The Open NAND Flash Interface Working Group (ONFI) developed a standardized low-level interface in late 2006 to allow interoperability between NAND devices by different vendors. It specifies a standard physical interface and a command set for reading, writing, and erasing NAND flash chips. The ONFI group is supported by major NAND flash manufacturers and electronics vendors such as Hynix, Intel, Micron Technology, and Numonyx.
Emerging Resistive Memory Technologies
Resistive random-access memory (RRAM) is a new non-volatile memory type which promises a 3D memory structure using a variety of dielectric materials for storage. Proposed dielectric materials include perovskites, transition metal oxides and chalcogenides.
RRAM devices utilize MOSFET transistors only for selection of memory cells, while the cells themselves can be stacked in a three dimensional array. This 3D configuration consists of parallel column electrodes crossed by perpendicular row electrodes with the charge trapping dielectric placed between the row electrode and the column electrode at every cross-point.
Since the memory cells are not electrically isolated from each other, selection of cells results in large stray currents which may in turn result in high BER. To reduce these stray currents, RRAM devices include a series diode at every cross-point.
RRAM is currently slated to be a frontrunner in replacing NAND flash memories. In the last 3 years, researchers from ITRI and HP have demonstrated RRAM to show better performance (in terms of programming voltages, endurance and switching times) than other non-NAND technologies. In 2008, HP Labs unveiled their implementation of a titanium dioxide (50nm) memristor which further pushes up the potential of RRAM technology, even in face of the upcoming 20nm Flash memories.
A similar technology from Unity Semiconductor, called CMOx, proposes a non-linear resistive material which reduces stray currents in cell arrays without need for series diodes. CMOx uses a two-layer combination of conducting and insulating metal oxides which exhibits a non-linear I-V characteristic. Through physically stacking these cells in a cross-point array, CMOx technology achieve 4 times the density of contemporary NAND Flash devices while delivering up to 10 times the speed.
Emerging Phase-Change Memory Technologies
Phase change memory technology is expected to be first commercially available NAND Flash replacement. As early as 2000, players like Intel and ST Microelectronics were investing heavily to develop a PCRAM based memory chip. One of the pioneers in PCRAM technology has been Ovonyx, which has since licensed out its technology to major players including Samsung, Intel, Lockheed Martin and Elpida.
As recently as 2009, several semiconductor memory manufacturers (most notably Samsung and Numonyx) have announced PCRAM memory chips with capacities upto 512MB and fabricated on 65nm-90nm processes.
Virtually all phase change memory prototypes utilize an alloy of germanium, antimony and tellurium, known as chalcogenide, as the memory element. Chalcogenides exhibit different resistivity at different crystallization stages, allowing the different crystalline states to be used for information storage. Using these states, each PCRAM element can store upto 2 bits of information and hence doubling the memory density.
However, PCRAM technology is as yet dogged with various challenges. Crystallization states of the chalcogenide material are
programmed using a sub-lithographic heating caused by electric current. Heating is unreliable as the resultant dissipation can easily cause bit errors in the neighboring cells. While such dissipation can be eliminated by using a high density programming current, it remains to be seen if these processes can be scaled in a cost-effective manner. Additionally, the resistance exhibited by the amorphous states tends to increase over time, limiting the ability and the motivation for manufacturers to use PCRAM for multi-level storage.
Emerging Magnetic Memory Technologies
Magnetoresistive RAM (MRAM) features yet another flavor of non-volatile memory technologies which achieves much faster switching cycles and higher endurance than flash memory.
MRAM uses magnetic storage elements, each of which is formed from two ferromagnetic plates separated by a thin insulating layer. One of the two plates is a permanent magnet set to a particular polarity and the other plate’s magnetic field is altered to match an external programming field.
There exist multiple techniques for reading/writing information in MRAM cells. For instance, in the recently developed spin-transfer torque (STT) technique, polarized electrons are made to change their spin which transfers their angular momentum to the magnetic material. STT scores high on power consumption and current requirements. At the same time, the industry is currently struggling for ways to maintain electron spin coherence and to reduce current requirements for reorientation of magnetic fields.
Information thus stored in an MRAM cell can be read by simply measuring the electrical resistance of the cell. The electrical resistance of the cell changes due to field orientation (an effect known as magnetic tunneling) in the two plates. The polarity of the writable plate is determined by measuring the resulting current (and hence the resistance). Subsequently, the stored bit is determined to be “1” if both plates are of same polarity
and “0” if they are of opposite polarities.
The MRAM technology while serving as a potential low cost alternate to Flash memory, is yet to be commercialized, owing to the huge initial costs of fabrication infrastructure. In 2008-2009, players such as Hynix Semiconductor, Grandis and Hitachi formed key partnerships to develop STT-RAM prototypes on a 65nm process. Hitachi in particular showcased a 32-Mbit spin-transfer torque RAM in June 2009. But it would still take years to perfect the technology for MRAM to rival cell sizes of contemporary Flash memory devices or convince flash memory manufactures across the industry to remodel their existing fabrication units for MRAM chips.
The Flash memory currently controls a huge $25 billion market and is expected to cover half of the entire semiconductor memory market. As technological improvements to the Flash memory saturate, several technologies are contending to either replace Flash memory or serve as its successor in enterprise storage and ultimately in handheld computing. Over the next 2 years in particular, we expect at least some of the leading manufacturers (including Samsung and Intel) to commercially introduce PCRAM and RRAM memory chips into the market. These years mark the tail end of the long turnaround cycle observed in the semiconductor industry in particular. Presently it is mostly a trade off between profits from the ripe Flash memory market and investing for the future alternative technologies.
Disclaimer: Views expressed are entirely personal and do not constitute legal advice.
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